RX MID CHANNELS
850: CH190 -- 881,6
GSM: CH 62 -- 947,4 MHz EGSM: CH 37 -- 942,4Mhz DCS: CH 700 -- 1842,8MHz PCS: CH 661 -- 1960MHz TRK CLK
( 26MHz for Digital IF Filter syncronisation) NEPTUNE LTS
35
U800
U150 ALGAE
N17
VBUCK
(VCC + 1,875V)
L & H
Tracking
19
Band
A11
NEP IO REG (VCC + 2.775V) Control
DSP Peripherals POWER
LNA
B5
20
Tracking Osc.
N
accelerator, encryption POWER CUTS VCC (VCC +1,875V) E2
22
Timer, Interupts
100kHz
BB I
27
A8
J1350
VSIM
LNA
AGC
23
RF Det.
BB
K2
BB IX
SIM DIO
SIM
28
B8
Out
16
Digital Channal
DMA
K3
6
Connector
Dual ADC
DSP
Direct
SIM
SIM RST
GND
LNA
LP Filter
PMA
AAF
25
CM IN
(decoupling analog GND) C9
Filters
DSP
J4
2
1.8 or 3V 4
17
IF Amp.
2 Pole Filter
(Post Mixer Amplifier) Analog / Digital
Digital
Memory
UltraLite
Memory
Interface
SIM CLK
VSIM
SIM Card
100kHz
29
BB Q
A9
L1
1,5
z
Converter
If Mixer
Access
13
104 MHz
3
SIM PD
z
H
BB
and LO
Controller
R1
H
LNA
AGC
14
(from PCAP - BATT DETB) RF Det.
30
BB QX
B9
M
z
Out
CS5
M
0
N13
(to Q1400)
0
z
0
H
5
H
8
M
n
RF REG
1
3.6 - 3.9 GHz
D9
D0-15
8
DATA BUS
d
M
0
0
d
0
47
RX
RX CP
D5
RX
n
Synthesizer
Shared Memory
a
0
an
9
RX VCO
Loop
Charge
ADDRESS BUS A1-24
9
B
1
RF 5V REG
C4
1Mbit RAM
B
d
d
Filter
Pump
h
n
5
Phase
w
ADDR.24
CE_1
an
ig
a
RX EN
9
42
o
SYNTH FD P
B6
Detect
1
6
L
B
H
Bh
3.4 - 3.7 GHz
RESET OUT B
w
U701
Synth F/B 720 - 915 MHz 41
SYNTH FB N
CE_2
o
ig
A6
Prescaler
CS0B
(to J1300)
1710 - 1785 MHz
L
H
4
3
4
G8 K1
TX VCO
W18
5
U700
Inverter
TX CP
2
B4
MCU
External
TX
MCU
Memory
VBUCK
PMODE
B5,B6...
U1300
K8
CP
ARM7
Memory
RST
880 - 915 MHz
TX
52 MHz
G17
EB1_B
F3
44
GMSK Mod &
Interface
F4
Loop
R707
TX_MOD
K16
D8
EB0_B
C2 FLASH
Mod DAC
4
Filter
HP-Filter
V17
CS1B
D6
RESET OUT (from Neptune) (TX)
36
J19
26 MHz
XTAL
R WB
F5,D5
3
A4
VPP_SIGNAL
EXC EN
T16
OEB
J2,H1,H8
Super Filter
Y805
26 MHz
D4
T19
BURSTCLK
C6
D700
32
EXTAL
VBUCK
Generator
Clock Generator
RF_CS
B4 Oscillator
L16
LBAB
E5
1
D4
2,45V
SPI
33
RF_DATA
N18
U8, V7, W9
ECBB
G7
4MB Ram
39
34
38
7, 8, 10, 11, 15, 18, 21, 37, 43, 48
31
RF_CLK
3
P2
LCD RS
A10
32 MB Flash
MQSPI
N3
LCD CS
PA_REF
PA Control
D12
M4
LCD CLK DATA(6) VBUCK
NEP_IO_REG
(PAC)
Display
P1
LCD SDATA DATA(7) TX_IN_LB
PA_DET
B10
L3...
LCD DATA (0 - 5) (VCC)
LOWB HIGH
T6
FL100
TX_IN_HB
U11
HKSW
Quard Saw Filter
TX_EN
U6
A13
MUTE*
and Matching
EURO_US
W7
L1 Timer
A14
DSL0
14
G10
DSL1
EXC_EN
N9
1
EXC_EN
G11
DLL2
15
High Band
TX VCO FRQ. RANGE
)
SPI
M1
VSIM_EN
TX VCO MID CHANNELS
C
1900MHz
(to Algae)
C13
MIDRATE1
12
850: 824 - 850Mhz
C
850: CH 190 - 836,6
(V
GPIO
G12
MIDRATE2
3
GSM : 890 - 915 MHz 13
High Band
GSM: CH 62 - 902,4MHz V6
RX_EN
1800MHz
EGSM: 880 - 915MHz EGSM: CH 37 - 897,4Mhz G
V14
OPT1
8
E
OPT2
(Flip Open/ Close
6
DCS: 1710 - 1785MHz DCS: CH 700 - 1747,8MHz R
W8
9
Detect)
Low Band
_
(not used anymore) 900MHz
PCS: 1850 - 1910MHz PCS: CH 661 - 1880 MHz F
T7
SW B+ EN
R
S550
10
T13
LOGIC SENSE
4
C14
HS INT
11
One
BaseBand UART2
Low Band
PA_B+ PA_B+
UART / USB
850MHz
Keypad
Timer
MQSPI
Wire
Serial Audio Universal
ADC DATA
Internal
Interface
Interface
Interface
Port Interface Bus
Asynchron.
BT
D4
Antenna
(rx) (tx)
Rx /Tx
5
A17 C15 D15
E3....
V12 W12
V13 U13
A12
B13
N13 D16
B15
1 NEP IO REG
5
Q801
M3
3
7
9
2
G3....
2
2
2
B16
N17
D19
32
12 33
11
V16
34
6
39
C16 A16
W13
T11 V11 B14 G8
W5
E3
W11
D13
B12
10
2
Light Sensor
EAGLE
B
c)n
E
J1
Antenna
U50
attery
K
esy
Switch
B
T
B
ck)
D
A
Mechanical
S
X
D
z
T
Y
U
m
(clo
E
G
B
(fram
W
B
T
X
H
I
Antenna Switch
T
O
B
S
O
_
E
3
2
1
R
T
R
B
K
S
D
E
O
T
W ata fro
K
T
M
IS
D
K
D
S
U
N
3
L
O
T
N
R
E
O
L
S
X
X
A
IN
S
S
O
AOC_DRIVE
IN
X
O
E
A
)
W
ire d
2
0
1
E
)
C
F
R
T
P
R
P
M
H
W
X
I C
I M
I M
C
IN
T
ap
g
High Band
E
-1
-7
K
_
_
C
R
o
e W
P
P
P
P
P
CMOS
V
X
V
V
T
S
0
0
L
P
P
P
P
S
d
n
2
E
E
P
)
A
A
A
A
21
2
2
2
17
LOWB_HIGH
0
O
PA Bias
B
B
B
B
B
B
C
R
C
S
S
S
A
A
S
B
m
0
tch
S
S
S
S
D
D
S
U
U
S
S
S
S
S
S
B
B
B
B
C
C
7
a
X
X
T
T
L
L
z)
B
B
B
B
B
LP
Circuit
8,16
TX_EN
B
B
P
P
U
U
U
U
U
U
(fro
U
K
K
R
B
B
H
(W
B
B
B
B
R
T
C
(to
M
Low Band
Neptune PCap
3
Neptune PCap
(from/ to Neptune
(from/ to U301 BT, 3
2
1
(1
USB/ RS232
Communication
Serial Audio for Ringtone Neptune - BT - Neptune Communication
and Voice Audio)
Communication and Wakeup) LP
U802
U1301
Buffer
Buffer
19
EURO_US
Z
Switch
B
18
EXC_EN
YB
H
Z
Control
D
K2
H
Circuit
14
PA_REF
N
3
K
A
2 )0
15
PA_DET
T
K
3 0
S
L
3
C
K J1
13
RF_REG
L
(VCC)
(to
C
Matching and
Power Detector
VCC
Combiner Network
PACII IC
GSM SERVICE SUPPORT GROUP
2004.04.02
Revision Overview LEVEL 3 AL Block Diagram Rev. 1.1
Rev. 1.0: Initial Block Diagram Rev1.1: V400 product added, V30x, V400, V50x, V600
V30x, V400, V50x, V600
updated RTC Batt. Connector to J1701, added D700, removed Q1400 and R936
Michael Hansen, Alexander Buehler Page 1of 2
FLIP
CONNECTOR
J1300
V30x, V400, V50x, V600
HAND SPKR+
1
34
LCD DATA(1)
HAND SPKR-
2
33
LCD DATA(2)
GND
3
32
LCD DATA(3)
GND
4
31
LCD DATA(4)
LCD DATA(0)
5
30
LCD DATA(5)
RESET OUT B
6
29
LCD CLK DATA(6) GA INT
7
28
LCD SDATA DATA(7) LCD RS
8
27
LCD CS
GND
9
26
ATI 1.8V( VBUCK) CLK 32KHZ B
10
25
PA B+
GND
11
24
GND
GA SPI CLK
12
23
GA 1.2V (from PCap) GND
13
22
GND
Only V50x and V600
GA SPI MISO
14
21
VVIB
(from PCap 1,3V from Vibrator Regulator) GA SPI CS
15
20
FUN SPI CS
GA SPI MOSI
16
19
IO REG
GND
17
18
(on PCB)
GND
Strip Line
Antenna
KEYPAD
KBC0 -1
KBR1 -7
MATRIX
60
0-9,*,#,
GND
9
Up, Down
R
Left-Right,
Bluetooth
Center,
BLUE_TX
Soft L+R,
(TXD2)
5
BLUE_RX
25
Menu, Send,
(RXD2)
33
ANTENNA
(CTS2)
BLUE_CTS
Volume U-D
(from/ to U301 BT, 10
NEP_IO_REG
29
Smart, VA
Neptune - BT - Neptune (RTS2)
BLUE_RTS
21
BTRF_REG
Communication and Wakeup) 31
U301
BLUE_WAKEB
11
PWR SW
POWER/END
BLUE_HOST_WAKEB
16
S513
9
Y300
(from Neptune/ PCap) BLUE_RESETB (RESETB) 22
15
(from PCap) CLK 32KHZ
BLUE_CLK_ENB
VBOOST
13
27 28 30 32
D1450- D1457
BACKLIGHT
LEDś
BB SAP RX
R1450- R1457
BB SAP FS
(framesync)
(from/ to Neptune
G
This resistor is IN the Serial Audio for Ringtone BB SAP CLK (clock) E
BL SINK
and Voice Audio)
R
Charger accessory and BB SAP TX
Neptune PCap
IO
is used for identification USB/ RS232
Communication
Neptune PCap
Communication
6
D
0
S
X
D
9
I
T
T
X
S
O
R
T
R
T
R
B
K
O
IS
E
D
U
L
T
N
D_
X
IN
E
C
M
M
S
IN
O
0
P
R
P
M
K
X
E
I_
I_
I_
C
IN
W
P
BATTERY
K
P
P
P
C
V
X
V
V
T
S
S
S
P
A
S
BATT FDBK
L
S
X
X
A
B
B
B
B
B
B
-S
_
_
A
2
C
R
J
S
S
S
S
S
S
5
CHARGER
C
F
R
T
B
B
B
C
N
P
0
0
P
P
P
P
H
U
U
U
U
U
U
B
B
B
P
O
WP
0
9
A
A
A
A
9
Headset
R
Internal
S
S
S
S
R
EXT_B+
Jack
B
B
B
B
6
C
C
C
C
C
C
C
C
B
B
B
B
C
C
C
C
D
G
MIC
N
N
N
N
N
N
N
BATT CONN.
N
N
N
N
A
J1240
E
ias)
1
HJACK_DET (to PCap IO) J1200
J2
7
1
0
R
INT MIC BIAS
3
1
0
9
7
8
9
7
8
8
8
1
1
1
3
4
1
4
5
1
(B
H
E
1
1
1
1
0
Y
K
D
C
A
B
G
C
A
IO
M1700
J8
B
A, B
INT_MIC_OUT
W
W
V
R
Y
5
HJACK_MIC
H2
V
W
A
9
(tx) (rx)
4
(tx) (rx)
PRI SPI
G2
O
SEC SPI
W19
AD TRIG (from EXC EN- (trigger)) R
E
.
USB/RS232
CNTL.
3
2
(External B+ Sense) (One Wire Bus
4
HJACK_SPKK
CODEC
ON
1
MIC BIAS 2
K2
CODEC
CNTL.
POWER
U20
EXT B+
R
T
IO
Neptune PCap
LOGIC
13 BIT
3
AD
to Neptune)
16 BIT
E
E
LOGIC
W1
(communication) (Battery Sense)
Neptune PCap
FAIL DET.
LOGIC
AA20
BATT+
OWB
2
HAND SPKR-
PHONE
STEREO
T
D
CONV.
V18
Communication
RAW_EXT_B+
GND
(Over Volt. Sense) U1
S
Alert
HAND SPKR+
W6
THERM
THERM
BATT+
AUDIO
D/A
Speaker
R2
(to PCap AD Converter) AMPL.
Y19
ISENSE
CE
ALERT-
(to Neptune)
M3
LOGIC SENSE
V6
AD8 (AUDIO_IN Sense) Conn.
J1260 1
ALERT+
(to PCap)
VR951
Color definition only for this section !
ON2
S
2
N2
Main Charge Path
J1400
Y6
BATT DETB (to SIM PD) G
D
CHARGE
AUDIO_OUT
B+ support without Ext Charger 15
EXT_OUT
CONTR.
Y20
CHRGC
Q950
N1
B+ support with Ext Charger AUDIO_IN
16
THERMBIAS
E1
Y7
S
MAIN_FET
G
SW B+
D
7
(Key Source
U901
SW B+ EN
IO
U21
Q952
L950
B+ for PCap IC) B+
W21
MIDRATE2 (from Neptune) Logic
USB PWR
Battery to B+
PA B+
6
A9
U900
OVER
OV GATE
Switch
(to EAGLE IC)
USB PU
VOLT. W18
VR950
D+
R904
B9
PCAP3
4
D+
23
USB
CNTL.
B7
24
1
D
LED
D4
EXT B+ to B+
NC
5
D-
D-
INTERF.
Switch
G
(from Neptune)
22
3
3
2
C7
CNTL.
B3
NC
Q953
MIDRATE 1
Q951
( from/ to PCap)
2
C3
BL SINK
RAW_BATT_FDBK
BACKl.
13
12
BATT_FDBK
NC Y4
S
4
TOUCH
CONTR.
R1459
NC
B2
BL FB
AA2
RAW_DSEL2
SCREEN
BATT.
G
10
DSEL2
16
9
NC Y3 INTERF.
RAW_DSEL1
V16
RTC_BATT
2
1
Q954
EXT B+
NC AA3
B4
D
(to PCap AD Converter 11
17
8
DSEL1
J1701
RAW_DSEL0
S
and internal Charger) DSEL0
MEMORY
Y900
12
18
7
E2
GND
RAW_OPT1
( to Neptune)
HOLD
B5
(from Neptune)
RAW EXT B+
13
OPT1
20
5
STANDBY
(Overvoltage Protection) RAW_OPT2
R14
(from Acesory Connector) 14
19
6
OPT2
TIMER
RAW EXT B+ to EXT B+
RAW_HKSW
CLK 32KHZ
8
SWITCH
14
HKSW
1
B6
(to Neptune and U301 BT) 8
11
e
RAW_MUTE*
e
e
d
E2
CLK 13 MHZ
d
d
MUTE*
er 3
o
er 2
o
er 1
o
se
9
E
15
10
IM
, ....Y
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
M
M
en
ra
itch
S
st M
itch
itch
2
IV
(from Neptune)
S
ib
IB
T18
WDOG
w
o
w
ck
w
ck
1
+
V
R
FL1400
V
S
o
S
u
S
u
V
B
B
B
,D
B
to
D
1
RAW_EXT_+
Y20
PCAP_MCU_RESET*
ESD Protection
1
2
0
0
1
3
8
9
0
1
9
0
1
1
( toPCap + Q954)
9
1
1
2
2
1
8
1
1
2
2
1
1
2
2
2
A
Y12
RESETB
1
1
G
C
N
M
J2
K
N
K
L
K
Y
H
B
F
G
A
R
1
C
C
G
S
N
N
17-20
Q924
)
C
D
lip
C
F
V
r in
S
G
rato
T
E
N
ib
U
G
E
G
R
V
E
_
G
E
G
G
K
C
E
( to
R
E
V
IO
T
B+
E
C
R
IM
R
R
S
IM
F
_
.2
D
U
E
R
R
S
S
V
O
E
F
F
1
U
B
W
V
5
O
R
A
IB
F
B
O
) V
) R
T
)R
) A
) IO
) V
V
P
V
GSM SERVICE SUPPORT GROUP
2004.04.02
V
V
V
) G
V
)
) R
)B
V
V
) V
5
5
5
5
5
5
)
V
/ 3
V
7
V
7
7
7
7
V
7
V
Revision Overview LEVEL 3 AL Block Diagram Rev. 1.1
,8
,8
,0
,5
,8
,7
,2
,7
,7
,6
,8
,3
Rev. 1.0: Initial Block Diagram ( 1
( 1
( 5
( 1
( 1
( 2
( 1
( 2
( 2
( 5
( 1
( 1
Rev1.1: V400 product added, V30x, V400, V50x, V600
(VCC)
updated RTC Batt. Connector to J1701, 3
(Enable)
Q960
added D700, removed Q1400 and R936
Michael Hansen, Alexander Buehler Page 2of 2
NEP IO REG ( 2,775V ) 2
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