Slajd19 (159)

BQ48o2 - PARAJLLEL REAL-TIME CLOCK

WE or CS must be held high during address transition.

Because l/O may be active (OE Iow) during the period, data input signals of opposite polarity to the outputs must be applied. If OE is high, the 1/0 pins remain in a State of high impedance.

EithertwRi or tyyR2 ^must 1)e met.

EithertDHl °rtDH2^mustbe met.

Figurę 8. Write Cycle No. 2 - CS Controlled

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