33436 Slajd28 (134)

JTAG

The JTAG interface is accessed through four of the AYR s pins. In JTAG terminology, these pins constitute the Test Access Port — TAP.

These pins are:

♦TMS: Test modę select. This pin is used for navigating through the TAP- controller State machinę.

♦TCK: Test Clock. JTAG operation is synchronous to TCK

•TDIs Test Data In. Serial input data to be shifted in to the Instruction Register or Data Register (Scan Chains).

♦TDO: Test Data Out. Serial output data from Instruction Register or Data Register.

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