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ÿþTomasulo s scheme The algorithm based on the idea of reservation station The reservation station fetches and buffers an operand as soon as it is available, eliminating the need to get the operand from a register. The use of reservation station leads to two important properties:  First, hazard detection and execution control are distributed  the information held in the reservation station at each functional unit determine when an instruction can begin execution at that unit,  Second, results are passed directly to functional units from the reservation stations where they are buffered (bypassing). 1 1 The basic structure of a MIPS floating-point unit 2 2 Three steps of instruction execution Issue  get instruction from the head of the instruction queue (FIFO), if there is a matching reservation station that is empty, issue the instruction to the station with the operand value, if they are currently in the register (this step renames registers, eliminating WAW and WAW). Execute  If one or more of the operands is not yet available, monitor the common data bus while waiting for it to be computed. When an operand becomes available, it is placed into the corresponding reservation station. When all operands are available, the operation is can be executed (RAW hazard avoided). Write result  when the result is available, write it on the CDB (Common Data Bus) and from there into the registers and into any reservation station waiting for this result. Stores also write data to memory. When both the address and data value are available, they sent to the memory unit and the store is completes. 3 3 Data stored in reservation station Op  the operation to perform on source operands S1 and S2, Qj, Qk  a value of zero indicates that the source operand is already available in Vj or Vk, or is unnecessary, Vj,Vk  the value of source operands, only one of the V field or the Q field is valid for each operand, for loads, the Vk field is used to hold the offset field, A  used to hold information for the memory address calculation (load and store), initially, the intermediate field is stored, after address calculation, the effective address, Busy  indicates that this reservation station and its accompanying functional unit is occupied, The number of reservation station that contains the operation whose result should be stored in the register is save in register Qi field, 4 4 How it works ? Let s consider the following example L.D F6,34(R2) L.D F2,45(R3) MUL.D F0,F2,F4 SUB.D F8,F2,F6 DIV.D F10,F0,F6 WAR ADD.D F6,F8,F2 Assume the following latencies: load  1, add  two, multiply  10, divide  40 clock cycles. 5 5 Execution Status when first load has completed Instruction status Instruction Issue Execute Write Result v v v L.D F6,34(R2) v v L.D F2,45(R3) MUL.D F0,F2,F4 SUB.D F8,F2,F6 DIV.D F10,F0,F6 ADD.D F6,F8,F2 6 6 The State of Reservation stations Name Busy Op Vj Vk Qj Qk A No Load1 45+Regs[R3] Yes Load Load2 Mem[34+Regs Yes SUB Load2 Add1 [R2]] Yes ADD Add1 Load2 Add2 Yes Add3 Regs[F4] Yes MUL Load2 Mult1 Mem[34+Regs Yes DIV Mult1 Mult2 [R2]] Registers status Field F0 F2 F4 F6 F8 F10 & & . Mult1 Load2 Add2 Add1 Mult2 Qi 7 7 Advantages of Tomasulo s scheme " The distribution of the hazard detection logic  if multiple instructions are waiting on a single result, and each instruction already has its other operand, then the instruction can be released simultaneously by the broadcast on the CDB (Common Data Bus). " The elimination of stalls for WAW and WAR hazards by renaming registers using reservation station, and by the process of storing operands into the reservation station as soon as they are available 8 8 Execution status when multiple is ready to write its result Instruction status Instruction Issue Execute Write Result v v v L.D F6,34(R2) v v v L.D F2,45(R3) v v MUL.D F0,F2,F4 v v v SUB.D F8,F2,F6 v DIV.D F10,F0,F6 v v v ADD.D F6,F8,F2 9 9 The State of Reservation stations Name Busy Op Vj Vk Qj Qk A No Load1 No Load2 No Add1 No Add2 No Add3 Mem[45+Regs Regs[F4] Yes MUL Mult1 [R3]] Mem[34+Regs Yes DIV Mult1 Mult2 [R2]] Registers status Field F0 F2 F4 F6 F8 F10 & Mult1 Mult2 Qi 10 10 A loop based example Let s consider the following example Loop: L.D F0,0(R1) MUL F4,F0,F2 S.D F4,0(R1) DADDUI R1,R1,-8 BNE R1,R2,Loop Let s assume that we predict that branches are taken, then using reservation station will allow multiple execution of above loop to proceed at once 11 11 All instructions of two successive iterations are issued Instruction status Instruction From Issue Execute Write Result iteration 1 v v L.D F0,0(R1) 1 v MUL.D F4,F0,F2 1 v S.D F4,0(R1) 2 v v L.D F0,0(R1) 2 v MUL.D F4,F0,F2 2 v S.D F4,0(R1) 12 12 Two active iterations of the loop with no instruction yet completed Name Busy Op Vj Vk Qj Qk A Load1 yes Load Regs[R1]+0 Load2 yes Load Regs[R1]-8 Add1 no Add2 No Add3 No Regs[R2] Mult1 Yes MUL Load1 Regs[R2] Mult2 Yes MUL Load2 Mult1 Store1 Yes Store Regs[R1]+0 Mult2 Store2 Yes Store Regs[R1]-8 Registers status Field F0 F2 F4 F6 F8 F10 & Qi load2 mult2 13 13

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