5196106184

5196106184



V

Basic configuratlon ol the new Horwitz-Silver CCML inverter stage.

bipolar devices combined with careful power supply voltage control, storing charge in input diodę netwbrks, and using bipolar and field-effect combina-tions. . •    *

The new Horwitz/Silver CCML Circuit consists of bipolar current mirror ele-ments connected in complement^ry con-figurations, operating primarily on current levels rather than voltages.

While this configuration requires charging up current levels on lines,Hor-witz said, the energy levcls required by currents are far less than for voltages on typical lines.

CCML circuits havc a very Iow power dissipation in the absence of input sig-nals and a Iow, tailorablc signal voltage swing, which may be of the order of 100mV.

Compared with field-effect configura-tions, CCML circuits require a lower signal voltage swing for a given output current swing, which Horwitz be|ieves gives CCML circuits a significant specd advantage over field-effect circuits.

Horwitz said he was recently encour-aged to learn that the fact that CCML configurations use both PNP and NPN transistors need not bring a disadvan-tage, despite “received wisdom” that PNP transistors are slower than NPN ones. Before going to Japan he talked to Prof Richard Swanson at Stanford University. Swanson’s latest work sug-gested PNP transistors have the capacity of bcing (aster than NPN transistors.

Minority carriers in the PNP transistors seem to travel faster than minority carriers in the NPN bases, Horwitz said.

Thereforc, in bipolar circuits we can get some advantages over CMOS circuits if we mix both polarities.

At the symposium he described a bipolar implementation of a CCML in-verter and the implementation of binary functions in CCML.

In the inverter the mirrors may have multiple ouiputs, or an output current which is a multiple or fraction of the

input current. The power supply volt-ages are typically + and — 0.5V, result-ing in almost zero gate current in the absence of an input signal. • ..    .

An input current causes a propor-tional output current to flow, resulting in a basie inverter action which may be binary, ternary or multi*valued. The multi-yalued action would result if the input current levels were variablc.

When tested for binary action a dis-crete-transistor implementation of the CCML inverter compared very favor-ably with ECL circuits madę from the same transistors used in CCML, Hor-witź said. The average gate delay of the ECL circuits was shown to be 3 or 4 times longer than that of the CCML in-vertcr, at a given gate power drain.

Horwitz says “CCML circuits have a big advantage over ECL in that ECL needs an emitter follower buffer stage to drive into any off-chip lines (typically of 50 ohm impcdance). Ńo such buffer stage is nceded by CCML circuits” .

From the test results, Horwitz expects the CCML power drain in practical ąp-plications will be less than 1/4 of that of ECL circuits in the prescnce of an input signal, and close to zero — as with CMOS — in the absence of an input signal.    *

In simple CCML circuits used to im-plement binary functions, some of the power advantage of CCML over ECL is lost, due to the larger number of indi-vidual. gates needed in the CCML configuration to make up a single function.

The advantages of CCML over ECL become morę apparent in the morę complex applications due to the currcnt-summation properties of CCML.

The variablc output current Ieve|s resulting from the current-summation can lead to saturation of the output devices, if the output currents are limited. with a resistor or a senes current mirror element. To avoid a lowering of the operating speed, Shottky clamping js used in such cases.

Horwitz’ work on CCML has been supported by the Joint Microclectronics Research Cenne at the Univcrsity of NSW, ATERB, and the Faculty Research Grants (Unisersity of NSW). In the. past the Radio Research Board supported the project. •    .

He said “I am grateful also to the Japanese symposium organisers for in-viting me to present this new logie in a special “high speed logie” session. The interest it attracted, specially from one of the largest Japanese telecommunica-tions companies, leads me to hope that CCML wilf shortly find its way into practical applications.”    . <2>

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