BD V180 A3 C L3 V1[1] 1


RX MID CHANNELS
( 26MHz for RC tuning)
GSM: CH 62 -- 947,4 MHz TRK CLK
EGSM: CH 37 -- 942,4Mhz
NEPTUNE
DCS: CH 700 -- 1842,8MHz
IO_2.65V
35
U800 (VCC)
Power DIG_1.875
U150
ALGAE
L & H Tracking RF_REG
19
DSP Peripherals
Band
Control
LNA B5
20 0-9,*,#,Send,
accelerator, encryption
Tracking Osc. N
KBR0 - KBR7
PWR/End,Menu,
Timer, Interupts
22
100kHz Keypad
BB_I Keypad Soft Left+Right
27 A8
KBC0, KBC1
LNA AGC
23 RF Det.
Matrix
BB Port Navigation Keys
BB_IX
28 B8
Out
DMA
Digital Channal
16
PWR_SW (to U900)
Dual ADC
DSP
Direct
PMA Filters DSP J513 PWR/END
LNA LP Filter AAF 25 CM IN (decoupling analog GND) C9 SIM_VCC
17
IF Amp. 2 Pole Filter Digital Memory
Memory
Analog / Digital
(Post Mixer Amplifier) UltraLite
K2
BB_Q
100kHz 29 A9
Access SIM
Converter If Mixer SIM_DIO GND
13 104 MHz
SIM
K3 2
Controller 4
BB and LO Interface
SIM_RST
LNA AGC BB_QX
14 RF Det. 30 B9 Connector
J4
Out 6 3 NC
SIM_CLK SIM_VCC (from U900)
J300
RF_REG
L1 5 1
n
D9
3.6 - 3.9 GHz
RX
47 RX RX Shared Memory
RX_CP D5 Synthesizer
DATA BUS D0-15
RX VCO Loop Charge
Loop
1Mbit RAM
VM_REG C4
Pump
Phase
5 Filter ADDRESS BUS A1-24
RX EN 9 42 SYNTH_FD_P B6 Detect
DIG_1.875 A6,E1,D6
3.4 - 3.7 GHz E1,G6
DIG_1,875
Synth F/B 720 - 915 MHz 41 SYNTH_FB_N
A6 Prescaler
G17 A2
EB1_B
1710 - 1785 MHz U705 A4,G4,A5
DIG_1,875
4
TX VCO
A1
MCU K16 EB0_B
TX_CP D4 External BURSTCLK
2 B4
U701
MCU
TX
SPI Memory
V17 CS1B
B5 SRAM R_WB
ARM7 C5 Flash
Memory
CP
J19
R_WB G5
52 MHz 32 Mbit LBAB C4 128 Mbit
880 - 915 MHz TXTX
GMSK Mod & Interface
44 Loop T16 OEB A2
CS0B E7
D8
Mod DAC
4 Loop
HP-Filter
OEB
F8
Software
(TX)
Filter XTAL
36 26 MHz A4 T19
BURSTCLK B5
RESET_OUT
3 EE Prom
EXC EN
26 MHz L16
Super Filter Y800 LBAB ECBB D3
EXTAL
32 B4 Oscillator Clock Generator V18 CS0B
Generator
RF_CS
1
SPI 33 N18
ECBB
2,45V
RF_DATA
W9, U8, V7
34
39 38 7, 8, 10, 11, 15, 18, 21, 37, 43, 48 31 RF_CLK 3 N3 LCD_CS
A10
P2 LCD_RS
MQSPI L3,L2, ...
PA Control
PA_REF
D12 (to J800 Display Con.)
LCD_DATA (0-5)
IO_2,65V (PAC) Display
TX_IN_LB B10
PA_DET LSC_CLK_DATA
M4
(VCC)
LOWB HIGH T6 P1 LCD_SDATA_DATA
TX_IN_HB
FL100
TX_EN U6
Quard Saw Filter
SIM_EN (to U900)
M1
and Matching EURO_US W7 L1 Timer
F4 LOW_BATT_B (from U900)
14
N9
EXC_EN
1
MQSPI
EXC_EN C13 USB_DET
15 High Band (to U600)
TX VCO FRQ. RANGE
TX VCO MID CHANNELS
1900MHz (to Algae) B15 SOFTCON
850: 824 - 850Mhz GPIO TOUT9
12 850: CH 190 - 836,6 T7
(to U500)
3
GSM : 890 - 915 MHz GSM: CH 62 - 902,4MHz G12 SC0A
13 High Band
1800MHz
EGSM: 880 - 915MHz EGSM: CH 37 - 897,4Mhz A13 ENT_MUTE(from J600)
8
6 D14 PC12 (to U900,U920)
DCS: 1710 - 1785MHz DCS: CH 700 - 1747,8MHz
9 Audio
Low Band
USB (from Lightsensor)
A14 PE12
Timer
900MHz PCS: CH 661 - 1880 MHz Codec
PCS: 1850 - 1910MHz
10 Interface V6 RX_EN ( to U150)
Interface Reset
AD / DA
4
11
Low Band U12 ANT_DET
BATT_B+ BATT_B+ B14
E3 T11 V12
C16
850MHz D15 C15 B17
V13
G8 W13 G9 D3 E4 C3 W5
A17 B16 P16 E1 V11 W12 E1 D7 D1 U13 G11
A16
USB_TXENB
USB_VPIN
(tfrom J800 Display Con.)
P_S
USB_VMIN
4 6
32 12 33 11 34 10
USB_XRXD
USB_VPOUT
USB_VMOUT
EAGLE
Internal USB_SUSPEND B+
Antenna
U930 DIG_1.875
Antenna U100
DIG_1.875_EN
Switch
(from / to U900)
3 2 1
J1 AOC_DRIVE
2
High Band
CMOS
21 LOWB_HIGH
17
PA Bias
C3 D5 E3 D3 C1
G3 H4 F5 F4
LP D2 D4
Circuit 8,16 TX_EN
Y900
A1
4 32kHz RTC
Low Band
3 2 1 Osc.
Mux.
B1 Reset
1
LP
32,768 kHz
T
HEAD_INT
WDOGB B2 i
C4
EUROB_US
19
m
A2
Switch PWR_SW
18 EXC_EN F2
e
Speaker
J400
Control J8
SPKP
IRQ r (To J800)
C2
PA_REF Amplifier
14
Circuit
J9 SPKN
15 PA_DET
HEAD_SPK
SPI
13 RF_REG NC (BL_SINK) C5
A1
ALTN
Power Detector
Matching and VCC
(VCC)
GPIO Alert F9
J410
Combiner Network
PACII IC
ALTP
Amplifier
Alert
E9
DISABLE E2
MIC
EXT_PWR_ON Control
F1
J4 J930
Charger Logic Microphone
LOW_BATT_B A2
MIC
Interface
Amplifier
CHRG_DETB D1
(from / to U920)
CHRG_STATE E1
CHRG_SW G1
HED_MIC
Aux.
J4
Microphone
CHRG_TYP E6
Amplifier
AD2 Mux
SIM_EN
C8
ADC_DATA E5
B+ Sense
D8, E8, F8
B+
ADC_SYNC F6
1,325 - 100uA
(from / to U800)
VAG Regulator VAG_CODEC
G6
2,75V- 150mA
Audio Reg. AUD_2.65V(Aud. analog funct. of Neptune & Seaweed)
J7
(TEMP)
1,3V- 200mA
PC12 D6 (To J800)
Vibrator Reg. VIB_OUT
G8
1,85/ 2,85V- 20mA
SIM Regulator B9 SIM_VCC (SIM Card)
2,75V- 200mA
(RTC)
RT900
V180 RF Regulator RF_REG (Synthes., SF reg., RF& AL funct.of Algae)
D9
1,575V- 100uA
Reference Reg.
B7 COINCELL
1,875V- 200mA
J950
b
Digital Reg. DIG_1.875_EN (to U930)
A9
2,75V- 200mA Coincell
I/O Regulator (to VM, NeptuneI/O, Ser- Flash, Displ.)
A8 IO_2.65V
4,7V- 5mA
Service Engineering & Optimization 2004.05.12
U900 V. Multiplier A3 VM_REG
(to Syn. Chargep., Switch control)
Revision Overview
SEAWEED
A5 A6
A8 A4
Rev. 1.0: initial Block Diagram
LEVEL 3 Block Diagram Rev. 1.1
Rev. 1.1: Change Alert - Speaker Amp. in Seaweed, Add
Quad Band V180 C934 C907 C908
Navigation Keys
Alexander Buehler, Michael Hansen Page 1of 2
Low Band 850 MHz
High Band 1800 MHz
Low Band 900 MHz
High Band 1900 MHz
RF_REG
25
23
27
29
IRQ
ADC_N
DAC_P
DAC_N
ADC_P
IO_2.65V
SPI_CLK
MISOA
MOSIA
SPI_CS3
CLK_32K
RESETB
WDOGB
AUD_2.65V
ADC_SYNC
ADC_DATA
VAG_CODEC
STANDBY_TODAI
RESET_OUT
(to U701)
ANT_DET
Charger
USB
SOL_EXT_B+
U920 U600
R907 R908
DIAMONDHEAD 3 16 SOFTCON
S 24-26
Flex Connector
B+ IO_2.65V
(Charge) (Charge and Protection) M4
14 USB_VCC
D
F900 Pass Transistor 7
9 USB_DNEG
J900 D512 1,2
Fuse
VIN 6,7,15,16 M5
PNP
E G B+ USB 10 USB_DPOS
EXT_B+ C S D 20+21
3
Current 3 P900
USB_DET
Interface 8 J800
Q900
Under- DISABLE
S Sense
22
1 USB_TXENB
IC
1,4 Sense
voltage
Battery
VIB_OUT 1 2 GND
B 28 PC12 (CHEMISTRY)
VDETECT13 Safety USB_VPIN
G 3
&Short Conn.
CHRG_C USB_VMIN LCD_CLK 3 4 LCD_SDATA
C Shunt G Circuit NC 4
3
Protect. USB_XRXD 5 6
2
2 CNTRL GND IO_2.65V
NPN B 8 M3 4 GND
Charge
USB_VPOUT
11
I / O GND 7 8 LED3
Charger
Control
D
USB_VMOUT
Q901 12
Logic
Jack (Drive) 2 LED2 9 10 LED1
19 BATT_DETB
1
5 USB_SUSPEND
E Charge 11 12 NC
EXT_PWR_ON
5 GND
Control
18 CHRG_STATE NC 13 14 SPKN
J600
17 CHRG_DETB
P_S
9-12 SPKP 15 16
Accesory
LCD_CS 17 18 IO_2.65V
Connector
Charger Detection Port (Pin2) GND 19 20
1 LCD_RS 21 22 GND
USB_VCC
(from U900 - If high current is set to 400mA limit. If low current is set to 900mA imit.)
CHRG_SW
R900 2 USB_DNEG LCD_DATA_0 23 24 LCD_DATA_1
USB_DPOS
3 LCD_DATA_3
LCD_DATA_2 25 26
(to U900 - Charger Type indication from pull down resisor in Charger)
CHRG_TYP
R901
4 ENT_MUTE LCD_DATA_4
27 28 LCD_DATA_5
(from U900) 5-9 GND
29 30 RESETB
IO_2.65V
R902
(Bias)
Keypad Backlight
U500
Menu Backlight Keypad Backlight
Driver
NC
BATT_B+ C1
D6
LED Light Sensor
NC
Driver
E5
IO_2.65V
SC0A B6 LED3
(from Neptune) D4
DS530
TOUT9 E7
1
LED4
E3
A7
Light U530
LED5 2
5
4
C5
1
Sense
LED6
PE12
D509 D510 3
B4 D501 D502 D508 D511
IO_2.65V (to Neptune)
LED7
C3
ISET
C7
VPOUT
A3
C505
D500 D506
Sign of live Circuit
D505
LED1
SOL
E C
(to J800) LED2
Q902 SOL_EXT_B+
2
3
LED3
B 1
S 3
G
Q903 IO_2.65V
1
D 2
V180
b
Service Engineering & Optimization 2004.05.12
Revision Overview
LEVEL 3 Block Diagram Rev. 1.1
Rev. 1.0: initial Block Diagram
Rev. 1.1: Change Alert - Speaker Amp. in Seaweed, Add
Quad Band V180
Navigation Keys
Alexander Buehler, Michael Hansen Page 2of 2
R501


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