Up: KBR1 - KBC0
RX MID CHANNELS
Left: KBR1 - KBC1 Center: GND - KBR4 Right:
KBC0 - KBR0
Down: KBR0 - KBC1
( 26MHz for RC tuning)
GSM: CH 62 -- 947,4 MHz TRK CLK
1,3,6
5,7a,7b
EGSM: CH 37 -- 942,4Mhz
JOYSTICK
NEPTUNE 2,4
DCS: CH 700 -- 1842,8MHz KBR0-KBR4
35
S5
U800
KBR6, KBR7
U150
ALGAE 0-9,*,#,Send,
L & H Tracking
19 Keypad
Keypad
DSP Peripherals KBC0, KBC1, KBC3 PWR/End,Menu,
Band
Control
LNA B5 Matrix
20 Port
accelerator, encryption
Tracking Osc. N Soft Left+Right
Timer, Interupts
22 PWR_SW (to U900)
100kHz
BB_I
27 A8 J513 PWR/END
SIM_VCC
LNA AGC
23 RF Det.
BB K2
BB_IX
28 B8 SIM SIM_DIO GND
Out
DMA
Digital Channal
SIM
16 K3 2
Dual ADC 4
DSP Interface
Direct
PMA Filters DSP SIM_RST
Connector
LNA LP Filter AAF 25 CM IN (decoupling analog GND) C9
17 J4 6 3 NC
IF Amp. 2 Pole Filter Digital Memory
Memory
Analog / Digital
(Post Mixer Amplifier) UltraLite
SIM_CLK SIM_VCC (from U900)
BB_Q
100kHz 29 A9 J800
Access
Converter If Mixer
13 104 MHz L1 5 1
Controller
BB and LO
LNA AGC BB_QX
14 RF Det. 30 B9
Out
IO_REG
(VCC)
RF_REG Power DIG_REG
n
D9
3.6 - 3.9 GHz
RF_REG
RX
47 RX RX Shared Memory
RX_CP D5 Synthesizer
RX VCO Loop Charge
Loop
1Mbit RAM
VM_REG C4
Pump
Phase
5 Filter U700
D0-15
DATA BUS
RX EN 9 42 SYNTH_FD_P B6 Detect
FLASH
3.4 - 3.7 GHz A1-24
ADDRESS BUS
Synth F/B 720 - 915 MHz 41 SYNTH_FB_N
A6 Prescaler
1710 - 1785 MHz
4 K1
TX VCO W18 CS0B B5,L4... DIG_REG (VCC from U900)
MCU
TX_CP D4 External
2 V17 CS1B D6
MCU
TX D4 VPP (from D904)
SPI Memory
F3
ARM7 G17 EB1
Memory
F4, K8
CP
RESET OUT
52 MHz K16 EB0 C2
880 - 915 MHz TXTX
(from Neptune)
GMSK Mod & Interface
44 Loop
D8
Mod DAC
4 Loop J19
HP-Filter R_WB F5,D5
(TX)
Filter XTAL T16
36 26 MHz A4 OEB J2,H1
3
EXC EN T19 BURSTCLK C6
26 MHz
Super Filter Y805
LBA 4MB Ram
L16 E5
EXTAL
32 B4 Oscillator Clock Generator Flip
Generator 16 MB Flash
RF_CS N18 ECBB G7
1
SPI 33
2,45V
RF_DATA
W9, U8, V7
34
(from U900)
39 38 7, 8, 10, 11, 15, 18, 21, 37, 43, 48 31 RF_CLK 3 N3 LCD_CS 1 2 RESETB
A10
P2 LCD_RS 3 4 IO_REG
MQSPI L3,L2, ...
PA Control
PA_REF
D12
LCD_DATA (0-5) 5-10 14,15
IO_2,65V (PAC) Display
TX_IN_LB B10
PA_DET LSC_CLK_DATA 11
M4
17 LED5
(VCC)
(from U400)
LOWB HIGH T6 P1 LCD_SDATA_DATA 12
TX_IN_HB 18 LED6
FL100
TX_EN U6
19 LED7
Quard Saw Filter
SIM_EN (to U900)
M1
and Matching EURO_US W7 L1 Timer
F4 LOW_BATT_B (from U900) 13,16,20
GND
14
N9
EXC_EN
1 USB_DET
MQSPI C13
J1502
EXC_EN (to U600)
15 High Band
TX VCO FRQ. RANGE
TX VCO MID CHANNELS B15 SOFTCON
1900MHz (to Algae) Display Connector
TOUT9 (to U400)
850: 824 - 850Mhz GPIO T7
12 850: CH 190 - 836,6
3 TOUT11 (to U6004)
V8
GSM : 890 - 915 MHz GSM: CH 62 - 902,4MHz
13 High Band
G12 SC0A (to U400)
1800MHz
EGSM: 880 - 915MHz EGSM: CH 37 - 897,4Mhz
A13 SC1A (from J600)
8
6
DCS: 1710 - 1785MHz DCS: CH 700 - 1747,8MHz
D14 PC12 (to U900,U920)
9 Audio
Low Band
USB
Timer
G10 PE11 (to U6005, U6006, U6007)
900MHz PCS: CH 661 - 1880 MHz Codec
PCS: 1850 - 1910MHz
10 Interface A14 PE12 (from Lightsensor)
Interface Reset
AD / DA
4
D19 INT5 (from U6007)
11
Low Band
PA_B+ PA_B+ E1 U12
E3 T11 V12
C16
850MHz D15 C15 B17
V13
G8 D18 V11 W12 E1 D7 D1
A17 B16 P16 W13 G9 D3 E4 C3 W5
A16 U13
USB_TXENB
USB_VPIN
USB_VMIN
4 6
32 12 33 11 34 10
USB_XRXD
USB_VPOUT
USB_VMOUT
EAGLE
Internal USB_SUSPEND
Antenna
Antenna U50 CKO
Switch SPI_CS6
(from / to U900)
(to U6001,U6004 SPI_CLK
A11
3 2 1 6006 and 6007)
MISOA
RESETB
(to J1512)
MOSIA
J100 AOC_DRIVE
2
High Band
CMOS
21 LOWB_HIGH
17
PA Bias
C3 D5 E3 D3 C1
G3 H4 F5 F4
LP D2 D4
Circuit 8,16 TX_EN
Y900
A1
A10 4 32kHz RTC
Low Band
3 2 1 Osc.
LOWB_HIGH
Mux.
B1 Reset
(to U100)
EUROB_US 1
LP
32,768 kHz HEAD_INT
T
(Enable)
C4
WDOGB B2 i
EUROB_US
19
J910 EXT_B+
m
A2 ALTN
Switch
18 EXC_EN
CHRG_ID
F9
4 4 5 PWR_SW e
F2 Alert 2
Control
ALTP
r Charge
U100 U101 PA_REF Amplifier E9 1
14
Circuit
Connector
1 3 1 3
15 PA_DET
SPK.
U902 U901
BL_SINK SPI
13 RF_REG C5
A1 SPKP A1 C1
J8
Power Detector
Matching and VCC 1
(VCC)
GPIO Speaker
SPKN A3 C3 R931
Combiner Network
PACII IC Yelow 2
J9
Amplifier Headset
Joystick Connector
CHG_DISABLE E2
Backlight HED_SPK
EXT_PWR_ON Control
F1
Charger Logic Microphone
LOW_BATT_B A2
Internal
Interface J3
Amplifier
Antenna CHRG_DETB D1
(from / to U920)
Mic
DS513
CHRG_STATE E1
Switching
HED_MIC
DS514 CHRG_SW G1 J931
Circuit H5
Aux.
Microphone
CHRG_TYP E6
Amplifier
SIM_EN
AD2 B6 AD2 Mux C8
IO_REG
ADC_DATA E5
B+ Sense
D8, E8, F8
B+
ADC_SYNC F6
1,325 - 100uA
(from / to U800)
VAG Regulator VAG_CODEC
G6
2,75V- 150mA
(Aud. analog funct. of Neptune & Seaweed)
Audio Reg. AUD_REG
J7
(TEMP)
1,3V- 200mA
PC12 D6
Vibrator Reg. MOTOR
G8
Vibrator
1,85/ 2,85V- 20mA
M900
SIM Regulator B9 SIM_VCC (SIM Card)
2,75V- 200mA
(RTC)
RT900
C650 RF Regulator RF_REG (Synthes., SF reg., RF& AL funct.of Algae)
D9
1,575V- 100uA
Reference Reg.
B7 COINCELL
1,875V- 200mA
J2003
b
(Neptune cores, logic& memory)
Digital Reg. DIG_REG_OUT DIG_REG
A9
2,75V- 200mA Coincell
I/O Regulator (to VM, NeptuneI/O, Ser- Flash, Displ.)
A8 IO_REG
4,7V- 5mA
GSM SERVICE SUPPORT GROUP 2004.04.02
U900 V. Multiplier A3 VM_REG
(to Syn. Chargep., Switch control)
Revision Overview
SEAWEED
A5 A6
A8 A4
Rev. 1.0: initial Block Diagram
LEVEL 3 AL Block Diagram Rev. 1.1
Rev. 1.1: change two R901 to R902 and R903/ change L404 to
Dual Band C650 C934 C907 C908
L104
Michael Hansen, Alexander Buehler Page 1of 2
Low Band 850 MHz
High Band 1800 MHz
Low Band 900 MHz
High Band 1900 MHz
RF_REG
25
23
27
29
ADC_N
DAC_P
DAC_N
ADC_P
SPI_CS1
IO_REG
SPI_CLK
MISOA
MOSIA
SPI_CS3
AUD_REG
CLK_32K
RESETB
WDOGB
ADC_SYNC
ADC_DATA
VAG_CODEC
STANDBY_TODAI
RESET_OUT
(to U700)
(OR Gate)
(SWitch)
C112
L104
EUROB_US
LOWB_HIGH
R600
R601
Photo Type ID
Keypad Backlight
Blue Keypad Backlights Sign of live Circuit
Camera Diver, Buffer
Regulator
U400
Driver
and Regulator U6005 LED1
1
Camera CVDD
B+ C1
D6 NC
LED
2 Y7 G1 A1,A3... IO_VDD D400
Connector C3 B+ LED2 SOL
Driver E C
3 Y5 G3 NC LED_DRV_EN A7
A6,B3... JO_VDD E5
C1
Q904
EXT_B+
J1503 F2
4 Y3
2
A1 (Enable) LED_GRPA_EN B6 LED3
PE11 SC0A 3
C7 RI_VDD DS505 DS502
C3
5 Y1 D4
B 1
TOUT9 LED_GRPB_EN E7
E2
6 CLK_IN LED4
DS504 DS507
NC
E3
A5
9 SDA S 3
(from Neptune)
LED5
10 NC G
C5
12 CVDD Q905 IO_REG
LED6
(to Display
C1 1
14 HREF B4
Connector)
G2
15 Y6 LED7 D 2
C3
F1
16 Y4
ISET
F3
17 Y2
C7
D6 TOUT11
VPOUT
C2
18 Y0
A3
E1 D2 CKO
19 CLK_OUT
20
VSYNC B4
21 C404
CLK_IN A4
B1
22 PWRON
7,8,11,
13,23,24
Camera
Driver
U6006
Buffer U6004
(Data) PE11 A1,B2
(from Neptune)
RXD F4
(Clock) MOSIA D2 C1
CTS F6
(Enable) B1 C2
SPI_CLK
U6007
Light Sensor
A1,B2
(Request To Send) F5
SPI_CS6 D2 C2 RTS IO_2.65V
(from/ to Neptune)
(Interupt)
INT5 C1 D2 SEL_UART E6
DS7000
1
U6001
Light U7000
2
5
4
(Data) MISOA C2 B1 TXD E7
1
Sense
(from/ to Neptune)
PE12
3
(Enable)
SPI_CS6 A1
IO_REG (to Neptune)
USB
Charger
U600
(from U900 - If high current is set to 400mA limit. If low current is set to 900mA imit.)
CHRG_SW
R901
16 SOFTCON
IO_REG
(to U900 - Charger Type indication from pull down resisor in Charger) 14 USB_VCC
CHRG_TYP
R902
7
9 USB_DNEG
(from U900)
USB 10 USB_DPOS
IO_REG
R903
(Bias)
USB_DET
Interface 8
1 USB_TXENB
IC
CHRG_ID
USB_VPIN
3
(from/ to J931)
USB_VMIN
4
(Charger ID and current setting)
USB_XRXD
U920 2
R913 R914
USB_VPOUT
11
DIAMONDHEAD 3
S 24-26
USB_VMOUT
B+ 12
(Charge) (Charge and Protection) M4
5 USB_SUSPEND
D
F900 Pass Transistor
1,2
Fuse
(from J931) EXT_B+ VIN 6,7,15,16 M5
PNP G B+
E S D 20+21
C
Current 3 M100 J600
Q901
Under- CHG_DISABLE
S Sense
22
Accesory
Sense
voltage
Battery
B PC12 (CHEMISTRY)
VDETECT13 Safety 28
(EXT_B+_SOL) G Connector
&Short
Conn.
D904 C Shunt Circuit NC
G 3
1
USB_VCC
4 Protect.
CNTRL
NPN B 8 M3 4 GND
Charge
NPN 1,2 2 USB_DNEG
3 3
I / O
Control
D USB_DPOS
TOUT12 Q904 Q903 3
Logic
(Drive) 2
19 BATT_DETB
1
(from U800) 4 SC1A
EXT_PWR_ON
1 E Charge
5
5-9
GND
Control
VPP DIG_REG 18 CHRG_STATE
(VCC from U900)
17 CHRG_DETB
(to U700 9-12
- for fast FLash Process)
C650
b
GSM SERVICE SUPPORT GROUP 2004.04.02
Revision Overview
Rev. 1.0: initial Block Diagram
LEVEL 3 AL Block Diagram Rev. 1.0
Rev. 1.1: change two R901 to R902 and R903/ change L404 to
Dual Band C650
L104
Michael Hansen, Alexander Buehler Page 2of 2
R406
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